EP20K400FC672-1XGZ vs EP20K400EFC672-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400FC672-1XGZ sa pamamagitan ng Intel at EP20K400EFC672-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K400FC672-1XGZ - 400K Gate APEX-20KE FPGA, 502 I/O, 672-FBGA | Intel
EP20K400FC672-1XGZ Obsolete
Pagsanggunian na paghahambing
| Parametro | EP20K400FC672-1XGZ | EP20K400EFC672-3 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Family | APEX-20KE | — |
| Logic Elements / Cells | 16,640 | — |
| System Gates | 400,000 (typical) | — |
| Embedded Memory Bits | 212,992 | — |
| Maximum User I/O | 502 | 488 pins |
| Packhaging | 672-pin FBGA (Fine-pitch BGA) | 672-ball FineLine BGA |
| Temperature na Operasyon | 0C to +85C (commercial) | 0 C to +85 C (commercial) |
| Core Supply Voltage | 2.5 V | — |
| Propagation Delay | 2.5 ns (per DigiChip listing) | 2.5 ns |
| Logic Family / Process | CMOS | — |
| Speed Grade | -1 (slowest commercial bin) | -3 (fastest commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL level per JEDEC J-STD-020] | — |
| Tindminan RoHS | Unknown (legacy part, pre-dates widespread RoHS conversion) | [DATA_NEEDED: RoHS status] |
| Configuration Method | JTAG / passive serial / passive parallel (per APEX-20KE handbook) | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+ (per APEX-20KE family datasheet) | — |
| Product Type | — | FPGA (Field Programmable Gate Array) |
| Series | — | APEX-20KE |
| Logic Elements | — | 16,640 (approx. 1,052,000 system gates) |
| Embedded Memory (bits) | — | 212,992 |
| User I/Os | — | 488 |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 2.5 V (multi-voltage I/O) |
| Logic Family | — | CMOS |