EP20K400FC672-1XGZ vs EP20K400EFC672-3 比較
詳細並排比較 EP20K400FC672-1XGZ 由 Intel 與 EP20K400EFC672-3 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K400FC672-1XGZ - 400K Gate APEX-20KE FPGA, 502 I/O, 672-FBGA | Intel
EP20K400FC672-1XGZ Obsolete
規格比較
| 參數 | EP20K400FC672-1XGZ | EP20K400EFC672-3 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Family | APEX-20KE | — |
| Logic Elements / Cells | 16,640 | — |
| System Gates | 400,000 (typical) | — |
| Embedded Memory Bits | 212,992 | — |
| Maximum User I/O | 502 | 488 pins |
| 封裝 | 672-pin FBGA (Fine-pitch BGA) | 672-ball FineLine BGA |
| 工作溫度 | 0C to +85C (commercial) | 0 C to +85 C (commercial) |
| Core Supply Voltage | 2.5 V | — |
| Propagation Delay | 2.5 ns (per DigiChip listing) | 2.5 ns |
| Logic Family / Process | CMOS | — |
| Speed Grade | -1 (slowest commercial bin) | -3 (fastest commercial) |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL level per JEDEC J-STD-020] | — |
| RoHS 狀態 | Unknown (legacy part, pre-dates widespread RoHS conversion) | [DATA_NEEDED: RoHS status] |
| Configuration Method | JTAG / passive serial / passive parallel (per APEX-20KE handbook) | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+ (per APEX-20KE family datasheet) | — |
| Product Type | — | FPGA (Field Programmable Gate Array) |
| Series | — | APEX-20KE |
| Logic Elements | — | 16,640 (approx. 1,052,000 system gates) |
| Embedded Memory (bits) | — | 212,992 |
| User I/Os | — | 488 |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 2.5 V (multi-voltage I/O) |
| Logic Family | — | CMOS |