EP20K400FI672-2 vs EP20K400EFC672-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400FI672-2 sa pamamagitan ng Altera at EP20K400EFC672-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K400FI672-2 - 400K Gates APEX-20K FPGA, 502 I/O, 672-FBGA | Altera
EP20K400FI672-2 ObsoletePagsanggunian na paghahambing
| Parametro | EP20K400FI672-2 | EP20K400EFC672-3 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Family | APEX-20K | — |
| Logic Elements | 16640 | 16,640 (approx. 1,052,000 system gates) |
| Maximum Gates | 400,000 gates | — |
| User I/Os | 502 | 488 |
| Embedded Memory Bits | 212992 | — |
| Number of Macros | 1664 | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 2.5 V | — |
| Maximum Internal Frequency | 200 MHz | — |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial) | 0 C to +85 C (commercial) |
| Package Type | 672-pin Fine-pitch Ball Grid Array (FBGA/FCBGA) | — |
| PLLs (Phase-Locked Loops) | 4 | — |
| Configuration Modes | JTAG, Passive Serial, Passive Parallel | — |
| Tindminan RoHS | Lead-free / RoHS Compliant | [DATA_NEEDED: RoHS status] |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Product Type | — | FPGA (Field Programmable Gate Array) |
| Series | — | APEX-20KE |
| Embedded Memory (bits) | — | 212,992 |
| Maximum User I/O | — | 488 pins |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 2.5 V (multi-voltage I/O) |
| Speed Grade | — | -3 (fastest commercial) |
| Packhaging | — | 672-ball FineLine BGA |
| Logic Family | — | CMOS |