EP20K400FI672-2 vs EP20K400FC672-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400FI672-2 sa pamamagitan ng Altera at EP20K400FC672-2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K400FI672-2 - 400K Gates APEX-20K FPGA, 502 I/O, 672-FBGA | Altera
EP20K400FI672-2 ObsoletePagsanggunian na paghahambing
| Parametro | EP20K400FI672-2 | EP20K400FC672-2 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX-20K | APEX-20K (MultiCore) |
| Logic Elements | 16640 | — |
| Maximum Gates | 400,000 gates | — |
| User I/Os | 502 | — |
| Embedded Memory Bits | 212992 | — |
| Number of Macros | 1664 | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Maximum Internal Frequency | 200 MHz | — |
| Propagation Delay | 2.5 ns | — |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial) | 0°C to +85°C (Commercial) |
| Package Type | 672-pin Fine-pitch Ball Grid Array (FBGA/FCBGA) | — |
| PLLs (Phase-Locked Loops) | 4 | — |
| Configuration Modes | JTAG, Passive Serial, Passive Parallel | — |
| Tindminan RoHS | Lead-free / RoHS Compliant | [DATA_NEEDED: RoHS status] |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Series | — | APEX-20K |
| Logic Elements / Cells | — | 16640 |
| Number of Macrocells | — | 1664 |
| Number of Logic Blocks | — | [DATA_NEEDED: LAB count] |
| Number of Gates | — | 400000 |
| Embedded Memory (Bits) | — | 212992 |
| Maximum User I/O | — | 502 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Operating Frequency (Max) | — | 200 MHz |
| Propagation Delay (tpd) | — | 2.5 ns |
| Packhaging | — | 672-ball FC-FBGA (BBGA) |
| Speed Grade | — | -2 |