EP20K400FI784-1 vs EP20K600EFC672-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400FI784-1 sa pamamagitan ng Altera at EP20K600EFC672-2X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400FI784-1 | EP20K600EFC672-2X |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20K | APEX 20KE |
| Series | EP20K400 | — |
| Device Type | Loadable PLD (FPGA-class) | — |
| Usable Gates | 400,000 | — |
| Logic Elements | 1,560 | — |
| Embedded Memory (EAB RAM) | 212,992 bits | — |
| Maximum User I/O | 488 | 508 |
| Maximum Internal Clock Frequency | 6.1 GHz | — |
| Package Type | 784-ball Fine-pitch BGA (S-PBGA-B784) | 672-pin FineLine BGA (FC-FBGA) |
| Uri ng Pagpapasok | Surface Mount | — |
| Temperature ng Junction na Operasyon | -40°C to +100°C (industrial 'I') | — |
| Supply Voltage - Core | 1.8 V | — |
| I/O Standards Supported | 3.3 V / 5 V PCI, LVTTL, LVCMOS | — |
| Dedicated Inputs | 4 | — |
| Process Technology | 0.18 µm CMOS, 6-layer metal | 0.15 µm all-layer copper CMOS |
| Boundary Scan | JTAG IEEE 1149.1 | — |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS status] | — |
| Typical Gates | — | 600,000 |
| Logic Elements / Cells | — | 24,320 |
| Embedded Memory Bits | — | 311,296 |
| Number of PLLs | — | 4 |
| Package Size | — | 45 x 45 mm, 1.27 mm pitch |
| Core Voltage | — | 1.8 V |
| Propagation Delay (typical) | — | 1.48 ns |
| Maximum Internal Frequency | — | 200 MHz |
| Temperature na Operasyon | — | 0 °C to +85 °C (commercial) |
| Lead-Free Variant | — | EP20K600EFC672-2N |
| Tindminan RoHS | — | Not RoHS compliant (X suffix is SnPb); use -2N suffix for lead-free |
| Configuration Method | — | Serial / Parallel (Quartus-supported) |