EP20K400GC652-1XV vs EP20K400GC655-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GC652-1XV sa pamamagitan ng Altera at EP20K400GC655-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400GC652-1XV | EP20K400GC655-2 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20K | APEX 20K |
| Logic Elements (Macros) | 1664 | — |
| Typical System Gates | 400,000 | — |
| Maximum User I/O | 502 | — |
| Embedded SRAM | 212,992 bits | — |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Propagation Delay | 2.5 ns | — |
| Logic Family | CMOS | — |
| Package Type | BGA-652 (thermally enhanced) | 655-BCPGA (CPGA-655) |
| Temperature na Operasyon | 0 C to +85 C | [DATA_NEEDED: operating temperature range] |
| Speed Grade | -1 (standard) | -2 |
| Uri ng Pagpapasok | Surface Mount | Through-Hole (CPGA) |
| Tindminan RoHS | Compliant (lead-free, V suffix) | [DATA_NEEDED: RoHS compliance status] |
| Architecture | MultiCore (LUT + EAB + FastTrack interconnect) | — |
| Programming Interface | JTAG (IEEE 1149.1) / passive serial | — |
| Series | — | APEX-20KC |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| System Gates | — | 400,000 |
| Logic Cells / Elements | — | 16,640 |
| Total RAM Bits | — | 212,992 |
| Maximum Internal Frequency | — | 200 MHz |
| Process Technology | — | 0.22 µm CMOS |
| I/O Supply Voltage | — | 1.71 V to 1.89 V (MultiVolt) |
| LVDS Support | — | Yes |
| PLLs | — | 4 |
| Bilang ng Pin | — | 655 |
| Package Dimensions | — | 62.48 x 62.48 mm |