EP20K400GC655-1 vs EP20K400BC652-1X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GC655-1 sa pamamagitan ng Intel at EP20K400BC652-1X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K400GC655-1 - 400K Gate APEX 20K FPGA, 655-pin CPGA | Intel/Altera
EP20K400GC655-1 ObsoleteIntel
EP20K400BC652-1X - APEX 20KE FPGA 400K Gates 652-BGA | Intel
EP20K400BC652-1X ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K400GC655-1 | EP20K400BC652-1X |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | APEX 20K | APEX 20K |
| Series | EP20K400 | APEX 20KE |
| Logic Elements | 16,640 | — |
| Maximum Gates | 1,052,000 | — |
| Typical Gates | 400,000 | — |
| Embedded System Blocks (ESBs) | 4 | — |
| Total RAM Bits | 212,992 | — |
| Maximum User I/O | 502 | 502 |
| Dedicated Inputs | 6 | 4 |
| Process Technology | 0.22 µm CMOS | 0.22 um CMOS |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 3.3 V | — |
| Maximum Internal Frequency | 250 MHz | — |
| Propagation Delay | 2.5 ns | — |
| Packhaging | 655-pin CPGA (Ceramic Pin Grid Array) | 652-ball PBGA (45 x 45 mm, 1.27 mm pitch) |
| Bilang ng Pin | 655 | — |
| Uri ng Pagpapasok | Through-Hole | Surface Mount |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | Industrial (per datasheet) |
| Configuration Modes | Passive Serial, Passive Parallel Async, Passive Parallel Sync | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| Tindminan RoHS | Non-compliant (contains lead in ceramic package) | [DATA_NEEDED: RoHS status not stated in retrieved snippets] |
| Logic Elements / Cells | — | 16,640 |
| System Gates | — | 400,000 |
| Embedded Memory (bits) | — | 212,992 |
| Embedded Array Blocks (EABs) | — | 104 x 2,048 bits |
| PLLs | — | 4 |
| DLLs | — | 4 |
| Maximum Frequency | — | 250 MHz |
| Propagation Delay (pin-to-pin) | — | 2.5 ns |
| Core Voltage | — | 2.5 V |
| I/O Standard Support | — | LVTTL, LVCMOS, PCI, SSTL-2/3, LVDS |
| Programming Interface | — | IEEE 1149.1 JTAG |