EP20K400GC655-2 vs EP20K400GI655-1V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GC655-2 sa pamamagitan ng Altera at EP20K400GI655-1V sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel
EP20K400GI655-1V ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K400GC655-2 | EP20K400GI655-1V |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | APEX-20KC | — |
| Family | APEX 20K | APEX 20K |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| System Gates | 400,000 | — |
| Logic Cells / Elements | 16,640 | — |
| Total RAM Bits | 212,992 | — |
| Maximum Internal Frequency | 200 MHz | — |
| Speed Grade | -2 | — |
| Process Technology | 0.22 µm CMOS | CMOS |
| Core Supply Voltage | 2.5 V | 2.5 V |
| I/O Supply Voltage | 1.71 V to 1.89 V (MultiVolt) | 2.5 V / 3.3 V |
| LVDS Support | Yes | — |
| PLLs | 4 | — |
| Bilang ng Pin | 655 | — |
| Package Type | 655-BCPGA (CPGA-655) | CBGA-655 (Ceramic Ball Grid Array) |
| Package Dimensions | 62.48 x 62.48 mm | — |
| Uri ng Pagpapasok | Through-Hole (CPGA) | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: industrial vs military grade] |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED] |
| Typical Gates | — | 400,000 |
| Logic Elements | — | 16,640 |
| Maximum User I/O | — | 502 |
| Dedicated Inputs | — | 4 |
| Package Code (JESD-30) | — | S-CPGA-P655 |
| Package Equivalence Code | — | SPGA655, 47x47 |
| Propagation Delay | — | 2.5 ns |
| Configuration | — | In-system programmable via JTAG |
| Boundary Scan | — | IEEE 1149.1 JTAG |
| Level ng MSL | — | 1 |
| Package Body Material | — | Ceramic |