EP20K400GC655-2N vs EP20K400GC655-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GC655-2N sa pamamagitan ng Altera at EP20K400GC655-2X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400GC655-2N | EP20K400GC655-2X |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20K |
| Number of Logic Elements | 16640 | — |
| Number of Logic Cells | 16640 | — |
| Total System Gates | 400000 | — |
| Total RAM Bits | 212992 | 212992 |
| Number of I/O | [DATA_NEEDED: I/O count] | 496 |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | [DATA_NEEDED: number of Logic Array Blocks] |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Voltage (VCCIO) | 2.5 V (LVDS-capable) | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Maximum Operating Frequency | 200 MHz | 200 MHz |
| Propagation Delay (Tpd) | 3.1 ns | — |
| Packhaging / Kaso | 655-BCPGA (Ceramic Pin Grid Array) | — |
| Supplier Device Package | 655-CPGA, 62.48 x 62.48 mm | — |
| Temperature na Operasyon | Industrial (per Altera part-number -N suffix) | [DATA_NEEDED: temperature grade] |
| Uri ng Pagpapasok | Through-Hole (CPGA, socket-compatible) | Through-hole (CPGA) |
| LVDS Support | Yes | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| Configuration Method | JTAG / Passive Serial | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Series | — | APEX-20KC® |
| Logic Elements / Cells | — | 16640 |
| System Gates | — | 400000 |
| Number of Dedicated Inputs | — | 6 |
| Number of EABs | — | [DATA_NEEDED: number of Embedded Array Blocks] |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage (MultiVolt) | — | 2.5 V / 3.3 V / 5 V |
| Package Type | — | 655-BCPGA (SPGA655) |
| Package Body Material | — | CERAMIC, metal-sealed cofired grid array |
| Package Dimensions | — | 47 x 47 mm |
| Peak Reflow Temperature | — | 220 °C |
| Programmability | — | In-system, JTAG (IEEE 1149.1) |