EP20K400GC655-2N vs EP20K400GI655-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GC655-2N sa pamamagitan ng Altera at EP20K400GI655-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400GC655-2N | EP20K400GI655-2 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | — |
| Number of Logic Elements | 16640 | — |
| Number of Logic Cells | 16640 | — |
| Total System Gates | 400000 | — |
| Total RAM Bits | 212992 | — |
| Number of I/O | [DATA_NEEDED: I/O count] | — |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | — |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Voltage (VCCIO) | 2.5 V (LVDS-capable) | — |
| Process Technology | 0.22 µm CMOS | — |
| Maximum Operating Frequency | 200 MHz | — |
| Propagation Delay (Tpd) | 3.1 ns | — |
| Packhaging / Kaso | 655-BCPGA (Ceramic Pin Grid Array) | — |
| Supplier Device Package | 655-CPGA, 62.48 x 62.48 mm | — |
| Temperature na Operasyon | Industrial (per Altera part-number -N suffix) | -40C to +85C (industrial) |
| Uri ng Pagpapasok | Through-Hole (CPGA, socket-compatible) | Through-Hole / Socket |
| LVDS Support | Yes | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| Configuration Method | JTAG / Passive Serial | JTAG, Passive Serial, Passive Parallel |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Manufacturer | — | Altera Corporation |
| Series | — | APEX 20K (EP20K400) |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Typical Gate Count | — | 400,000 gates |
| Logic Elements (LE) | — | 16,640 |
| Maximum User I/O | — | 496 |
| Dedicated Inputs | — | 6 |
| Number of Terminals | — | 655 |
| Packhaging | — | SPGA-655 (47 mm x 47 mm) |
| Nominal Supply Voltage | — | 2.5 V |
| Supply Voltage Range | — | 2.375 V to 2.625 V |
| Propagation Delay | — | 3.1 ns (typical) |
| Technology | — | CMOS SRAM |
| Moisture Sensitivity Level | — | 1 (per Altera family) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+ |
| Embedded Memory | — | Embedded System Blocks (ESBs) |
| Katayuan ng Lifecycle | — | Obsolete (legacy Altera APEX 20K family) |