EP20K400GC655-2N vs EP20K400GI655-2 比較

詳細並排比較 EP20K400GC655-2N 由 Altera 與 EP20K400GI655-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K400GC655-2N EP20K400GI655-2
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX 20KC —
Number of Logic Elements 16640 —
Number of Logic Cells 16640 —
Total System Gates 400000 —
Total RAM Bits 212992 —
Number of I/O [DATA_NEEDED: I/O count] —
Number of LABs/CLBs [DATA_NEEDED: LAB count] —
Core Voltage (VCCINT) 1.71 V to 1.89 V —
I/O Voltage (VCCIO) 2.5 V (LVDS-capable) —
Process Technology 0.22 µm CMOS —
Maximum Operating Frequency 200 MHz —
Propagation Delay (Tpd) 3.1 ns —
封裝 / 外殼 655-BCPGA (Ceramic Pin Grid Array) —
Supplier Device Package 655-CPGA, 62.48 x 62.48 mm —
工作溫度 Industrial (per Altera part-number -N suffix) -40C to +85C (industrial)
安裝類型 Through-Hole (CPGA, socket-compatible) Through-Hole / Socket
LVDS Support Yes —
Architecture MultiCore (LUT + product-term + embedded memory) —
Configuration Method JTAG / Passive Serial JTAG, Passive Serial, Passive Parallel
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
MSL 等級 [DATA_NEEDED: MSL level] —
Manufacturer — Altera Corporation
Series — APEX 20K (EP20K400)
Device Type — Field Programmable Gate Array (FPGA)
Typical Gate Count — 400,000 gates
Logic Elements (LE) — 16,640
Maximum User I/O — 496
Dedicated Inputs — 6
Number of Terminals — 655
封裝 — SPGA-655 (47 mm x 47 mm)
Nominal Supply Voltage — 2.5 V
Supply Voltage Range — 2.375 V to 2.625 V
Propagation Delay — 3.1 ns (typical)
Technology — CMOS SRAM
Moisture Sensitivity Level — 1 (per Altera family)
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL+
Embedded Memory — Embedded System Blocks (ESBs)
生命週期狀態 — Obsolete (legacy Altera APEX 20K family)

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