EP20K400GC655-3X vs EP20K400GC655-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GC655-3X sa pamamagitan ng Altera at EP20K400GC655-2X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400GC655-3X | EP20K400GC655-2X |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX-20KC | APEX-20KC® |
| Family | APEX 20K (MultiCore architecture, LUT + product-term + embedded memory) | APEX 20K |
| Manufacturer | Altera (now Intel FPGA) | — |
| Logic Elements / Cells | 16,640 | 16640 |
| System Gates | 400,000 | 400000 |
| Total RAM Bits | 212,992 bits | 212992 |
| Maximum Internal Frequency | 167 MHz (speed grade -3) | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V (LVDS support per APEX 20KE datasheet) | — |
| Packhaging / Kaso | 655-BCPGA (CPGA655, 62.48 x 62.48 mm) | — |
| Uri ng Pagpapasok | Through-Hole (CPGA, ceramic) | Through-hole (CPGA) |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: temperature grade] |
| Speed Grade | -3 (fastest) | — |
| Suffix Code | -X (extended / ceramic CPGA variant) | — |
| I/O Count | [DATA_NEEDED: max user I/O] | — |
| JTAG / Boundary Scan | IEEE 1149.1 (per APEX 20K family) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status - ceramic CPGA historically non-RoHS] | unknown |
| Number of I/O | — | 496 |
| Number of Dedicated Inputs | — | 6 |
| Number of LABs/CLBs | — | [DATA_NEEDED: number of Logic Array Blocks] |
| Number of EABs | — | [DATA_NEEDED: number of Embedded Array Blocks] |
| Maximum Operating Frequency | — | 200 MHz |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage (MultiVolt) | — | 2.5 V / 3.3 V / 5 V |
| Package Type | — | 655-BCPGA (SPGA655) |
| Package Body Material | — | CERAMIC, metal-sealed cofired grid array |
| Package Dimensions | — | 47 x 47 mm |
| Peak Reflow Temperature | — | 220 °C |
| Programmability | — | In-system, JTAG (IEEE 1149.1) |