EP20K400GI655-3 vs EP20K400GI655-2V Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GI655-3 sa pamamagitan ng Altera at EP20K400GI655-2V sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K400GI655-3 EP20K400GI655-2V
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family APEX 20KE APEX 20K
Logic Elements / Cells 16,640 —
System Gates 400,000 (maximum) —
Maximum User I/O 502 —
Dedicated Inputs 4 6
Number of Terminals 655 —
Packhaging 655-Pin PGA (Plastic/CPGA, square) SPGA-655 (ceramic, 47 x 47 mm)
JESD-30 Code S-CPGA-P655 —
Package Shape Square —
Form of Terminal PIN/PEG (through-hole) —
Uri ng Pagpapasok Through-Hole (Socket) —
Process Technology CMOS, 2.5V core 0.18 µm CMOS
Core Supply Voltage 2.5 V 2.5 V (2.375 V to 2.625 V)
I/O Supply Voltage 2.5 V or 3.3 V (MultiVolt I/O) 3.3 V
Temperature na Operasyon 0°C to 70°C (Industrial I grade) Industrial (per -2V speed grade)
Speed Grade -3 (slowest of the EP20K400 family) —
Configuration Modes Passive Serial, Passive Parallel Asynchronous, JTAG —
Embedded Memory Dual-port RAM via Embedded System Blocks (ESBs) —
JTAG / Boundary Scan IEEE 1149.1 compliant —
Tindminan RoHS [DATA_NEEDED: RoHS status] Non-compliant (ceramic SPGA, contains lead)
Maximum Gates — 400,000
Logic Elements — 16,640
Embedded RAM Bits — 212,992
User I/O Pins — 496
Package Equivalence Code — SPGA655,47X47
Propagation Delay — 3.0 ns to 3.1 ns
Level ng Sensitivity sa Asid ng Moisture (MSL) — 1
Package Body Material — Ceramic

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