EP20K600CB652C-8 vs EP20K600CB652C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CB652C-8 sa pamamagitan ng Altera at EP20K600CB652C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CB652C-8 | EP20K600CB652C7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX 20KC | APEX 20K |
| Family | APEX 20KC (MultiCore) | APEX 20KC |
| Typical Gates | 600,000 | — |
| Logic Elements | 24,320 | 24,320 |
| Embedded RAM | 311,296 bits | 311,296 bits |
| User I/Os | 488 | — |
| Propagation Delay | 1.48 ns (per published source) | — |
| Packhaging | 652-BGA (LBGA, 45 x 45 mm, 1.27 mm pitch) | 652-ball BGA |
| Uri ng Pagpapasok | Surface Mount (thermally enhanced) | — |
| Temperature na Operasyon | 0 C to 85 C (commercial) | Commercial (0C to +70C) |
| Speed Grade | -8 (slowest, most timing margin) | C7 |
| VCCIO Options | 1.8 V / 2.5 V / 3.3 V | — |
| Process | 0.15 µm all-layer copper metal | — |
| PCI Compliance | PCI Local Bus Rev 2.2 at 33/66 MHz, 32/64-bit | — |
| Memory Interface Support | DDR SDRAM, ZBT SRAM, QDR SRAM, LVDS | — |
| Configuration | Enhanced (EPC) bitstream | — |
| System Gates | — | 600,000 |
| User I/O Count | — | 488 |
| Process Technology | — | 0.15 µm CMOS (all-layer copper interconnect) |
| Core Voltage | — | 1.8 V |
| I/O Voltage Support | — | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) |
| Maximum Frequency | — | 375.94 MHz |
| Architecture | — | MultiCore (LUT + embedded memory) |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS compliance status] |