EP20K600CB652C-8 vs EP20K600CB652C7 比較
詳細並排比較 EP20K600CB652C-8 由 Altera 與 EP20K600CB652C7 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K600CB652C-8 | EP20K600CB652C7 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | APEX 20KC | APEX 20K |
| Family | APEX 20KC (MultiCore) | APEX 20KC |
| Typical Gates | 600,000 | — |
| Logic Elements | 24,320 | 24,320 |
| Embedded RAM | 311,296 bits | 311,296 bits |
| User I/Os | 488 | — |
| Propagation Delay | 1.48 ns (per published source) | — |
| 封裝 | 652-BGA (LBGA, 45 x 45 mm, 1.27 mm pitch) | 652-ball BGA |
| 安裝類型 | Surface Mount (thermally enhanced) | — |
| 工作溫度 | 0 C to 85 C (commercial) | Commercial (0C to +70C) |
| Speed Grade | -8 (slowest, most timing margin) | C7 |
| VCCIO Options | 1.8 V / 2.5 V / 3.3 V | — |
| Process | 0.15 µm all-layer copper metal | — |
| PCI Compliance | PCI Local Bus Rev 2.2 at 33/66 MHz, 32/64-bit | — |
| Memory Interface Support | DDR SDRAM, ZBT SRAM, QDR SRAM, LVDS | — |
| Configuration | Enhanced (EPC) bitstream | — |
| System Gates | — | 600,000 |
| User I/O Count | — | 488 |
| Process Technology | — | 0.15 µm CMOS (all-layer copper interconnect) |
| Core Voltage | — | 1.8 V |
| I/O Voltage Support | — | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) |
| Maximum Frequency | — | 375.94 MHz |
| Architecture | — | MultiCore (LUT + embedded memory) |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS compliance status] |