EP20K600CB652C7 vs EP20K600CB652C7ES Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CB652C7 sa pamamagitan ng Altera at EP20K600CB652C7ES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K600CB652C7 EP20K600CB652C7ES
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Series APEX 20K —
Family APEX 20KC APEX 20KC
System Gates 600,000 600,000
Logic Elements 24,320 24,320
Embedded RAM 311,296 bits —
User I/O Count 488 —
Packhaging 652-ball BGA —
Process Technology 0.15 µm CMOS (all-layer copper interconnect) 0.15 µm CMOS
Core Voltage 1.8 V —
I/O Voltage Support 1.8V / 2.5V / 3.3V / 5V (MultiVolt) —
Maximum Frequency 375.94 MHz —
Architecture MultiCore (LUT + embedded memory) —
Temperature na Operasyon Commercial (0C to +70C) 0 °C to +85 °C (commercial)
Speed Grade C7 —
Tindminan RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Maximum System Gates — 1,053,840
Embedded Memory Bits — 311,296
Embedded System Blocks (ESB) — 26
Maximum User I/O — 488
User I/O (this package) — 488 (652-BGA)
Supply Voltage - Core — 1.71 V to 1.89 V (1.8 V nominal)
Maximum Internal Clock Frequency — 1666.6 MHz
Propagation Delay — 1.6 ns
Package Type — 652-ball FineLine BGA
JEDEC Package Code — S-PBGA-B652
Configuration Modes — Passive Serial, Passive Parallel, JTAG
JTAG Boundary Scan — IEEE 1149.1 compliant
PLLs — 4
Uri ng Pagpapasok — Surface Mount (BGA)

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita