EP20K600CB652I7N vs EP20K600CB652C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CB652I7N sa pamamagitan ng Altera at EP20K600CB652C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CB652I7N | EP20K600CB652C7N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Typical Gates | 600,000 | — |
| Logic Elements (Cells) | 24,320 | — |
| Maximum Operating Frequency | 375.94 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 um all-layer copper-metal |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| Packhaging | 652-pin FineLine BGA | 652-ball BGA (PBGA-652, S-PBGA-B652) |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| User I/O Banks | [DATA_NEEDED: User I/O Banks] | — |
| Maximum User I/O | [DATA_NEEDED: Maximum User I/O] | — |
| Embedded System Block (ESB) Memory | 311,040 bits | — |
| Phase-Locked Loops (PLLs) | 4 | — |
| Operating Temperature Grade | Industrial (-40C to +100C) | — |
| Speed Grade | 7 | — |
| Configuration Method | SRAM-based, JTAG (IEEE 1149.1) | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Device Type | — | SPLD / Loadable PLD (FPGA) |
| System Gates | — | 600,000 |
| Logic Elements | — | 24,320 |
| Embedded Memory (bits) | — | 311,296 |
| Maximum User I/Os | — | 488 |
| Propagation Delay | — | 1.48 ns |
| Internal Operating Frequency | — | 375.94 MHz |
| Core Supply Voltage | — | 1.8 V |
| Package Dimensions | — | 45 x 45 mm |
| Ball Pitch | — | 1.27 mm |
| Temperature na Operasyon | — | 0 C to 85 C |