EP20K600CB652I8 vs EP20K600CB652I7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CB652I8 sa pamamagitan ng Intel at EP20K600CB652I7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CB652I8 | EP20K600CB652I7N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Series | EP20K600 | — |
| System Gates | 600,000 | — |
| Logic Elements / Cells | 24,320 | — |
| Maximum Operating Frequency | 301.21 MHz | 375.94 MHz |
| Propagation Delay (tpd) | 1.78 ns (CMOS) | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| Core Supply Voltage (VCCINT) | 1.8 V nominal (1.71 V to 1.89 V) | 1.8 V |
| Temperature na Operasyon | -40 °C to +85 °C (Industrial) | — |
| Packhaging | 652-ball FineLine BGA (S-PBGA-B652) | 652-pin FineLine BGA |
| Package Code | BGA, square | — |
| Ball Pitch | 1.27 mm | — |
| Package Body Size | 45 mm × 45 mm | — |
| User I/O Lines | 488 | — |
| Dedicated Clock Inputs | 4 | — |
| Programming Interface | IEEE 1149.1 JTAG (in-system) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Typical Gates | — | 600,000 |
| Logic Elements (Cells) | — | 24,320 |
| User I/O Banks | — | [DATA_NEEDED: User I/O Banks] |
| Maximum User I/O | — | [DATA_NEEDED: Maximum User I/O] |
| Embedded System Block (ESB) Memory | — | 311,040 bits |
| Phase-Locked Loops (PLLs) | — | 4 |
| Operating Temperature Grade | — | Industrial (-40C to +100C) |
| Speed Grade | — | 7 |
| Configuration Method | — | SRAM-based, JTAG (IEEE 1149.1) |