EP20K600CF672C-9 vs EP20K600CB672C7 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672C-9 sa pamamagitan ng Altera at EP20K600CB672C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K600CF672C-9 EP20K600CB672C7
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Device Type FPGA (APEX 20KC family, complex PLD) FPGA / Programmable Logic Device (PLD)
Typical Gate Count 600,000 gates —
Logic Elements (LEs) [DATA_NEEDED: logic element count] —
Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count and total RAM bits] —
User I/Os 488 pins 488
PLLs 4 —
Packhaging 672-ball FBGA (45 x 45 mm, 1.27 mm pitch) 672-ball FineLine BGA (45 x 45 mm, 1.27 mm pitch)
Bilang ng Pin 672 —
Core Supply Voltage (VCCINT) 1.8 V —
I/O Supply Voltage (VCCIO) 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) —
Propagation Delay 1.48 ns 1.48 ns
Temperature na Operasyon 0 °C to +85 °C (commercial) 0 °C to 85 °C (commercial)
Speed Grade -9 C7 (commercial, 0 °C to 85 °C)
Process Technology 0.15 µm all-layer copper interconnect 0.15 µm all-layer copper-metal CMOS
Configuration Interface Serial (EPC16 / EPC8 / EPC4 / EPC2 / EPC1) —
Uri ng Pagpapasok Surface Mount (BGA) —
Tindminan RoHS unknown Compliant
Family — APEX 20KC
Typical Gates — 600,000
Maximum System Gates — 1,053,840
Logic Elements — 30,960 (typical)
Embedded Memory — 311 kbits (EAB-based)
Core Voltage — 2.5 V
I/O Voltage Support — 1.8 V, 2.5 V, 3.3 V (MultiVolt I/O)
Number of PLLs — 4
Dual-Port RAM — Yes (4.5 ns access)
Supported I/O Standards — LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, AGP, HSTL, CTT
Configuration Method — EPC configuration devices / JTAG / passive serial

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