EP20K600CF672I-8ES vs EP20K600CF672C7N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672I-8ES sa pamamagitan ng Altera at EP20K600CF672C7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K600CF672I-8ES EP20K600CF672C7N
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family APEX 20KC —
Logic Elements 24,320 —
Typical Gates 600,000 (ASIC-equivalent) 600,000
Embedded Memory Bits 311,296 —
Maximum User I/O Pins 508 488
Embedded PLLs 4 —
Core Voltage 1.8 V 1.8 V
I/O Standards Supported LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ —
Process Technology 0.18 micron CMOS SRAM 0.15 µm all-layer copper-metal CMOS
Speed Grade -8 (slower) C7
Temperature na Operasyon -40C to +100C (Industrial) 0 °C to +85 °C (Commercial)
Packhaging 672-ball BGA (FineLine BGA, 1.27 mm pitch) FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch
Configuration Modes Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG —
In-System Programmability Yes (ISP via EPC16, EPC8, EPC4, EPC2, EPC1) —
Tindminan RoHS Non-compliant (legacy Altera leaded BGA process) unknown
Level ng MSL [DATA_NEEDED: moisture sensitivity level] —
Device Family — APEX 20KC
Maximum System Gates — 1,052,000
Logic Elements / Cells — 24,320
Total Package Pins — 652
Maximum Operating Frequency — 375.94 MHz
Propagation Delay — 1.48 ns
Architecture — MultiCore (LUT + Embedded System Memory)
Seated Height — 3.50 mm
Uri ng Pagpapasok — Surface Mount (BGA)

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