EP20K600CF672I8 vs EP20K600CF672C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672I8 sa pamamagitan ng Altera at EP20K600CF672C7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CF672I8 | EP20K600CF672C7N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | — |
| Device Type | SPLD / FPGA | — |
| Logic Elements / Cells | 24,320 | 24,320 |
| Macros (Logic Cells) | 2432 | — |
| Typical Gate Count | 600,000 gates | — |
| Embedded Memory | 311,296 bits | — |
| User I/Os | 488 to 508 | — |
| Bilang ng Pins | 652 (functional) / 672 (BGA balls) | — |
| Propagation Delay (typical) | 1.48 ns | — |
| Internal Frequency (max) | [DATA_NEEDED: max internal frequency in MHz] | — |
| Core Supply Voltage | 1.8 V | — |
| Process Technology | 0.15 µm all-layer copper | 0.15 µm all-layer copper-metal CMOS |
| Temperature na Operasyon | 0 °C to +85 °C (Industrial) | 0 °C to +85 °C (Commercial) |
| Package Type | 672-ball BGA, 45 x 45 mm, 1.27 mm pitch | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Tindminan RoHS | Compliant per legacy product records | unknown |
| Configuration Interface | JTAG / Passive Serial | — |
| Design Tool | Quartus II (legacy MAX+PLUS II) | — |
| Device Family | — | APEX 20KC |
| Maximum System Gates | — | 1,052,000 |
| Typical Gates | — | 600,000 |
| Maximum User I/O Pins | — | 488 |
| Total Package Pins | — | 652 |
| Packhaging | — | FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch |
| Core Voltage | — | 1.8 V |
| Maximum Operating Frequency | — | 375.94 MHz |
| Propagation Delay | — | 1.48 ns |
| Architecture | — | MultiCore (LUT + Embedded System Memory) |
| Speed Grade | — | C7 |
| Seated Height | — | 3.50 mm |