EP20K600EFC33-2X vs EP20K600EFC144-2XN Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600EFC33-2X sa pamamagitan ng Altera at EP20K600EFC144-2XN sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600EFC33-2X | EP20K600EFC144-2XN |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX-20KE | — |
| Family | APEX 20K (System-on-a-Programmable-Chip) | APEX 20KE |
| Logic Elements / Cells | 24320 | — |
| Total Gates | 600000 | — |
| Total RAM Bits | 311296 | — |
| Number of I/O | 588 | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Process Technology | 0.15 um all-layer copper metal | 0.18 um CMOS, 6-layer metal |
| Maximum Internal Frequency | 200 MHz | — |
| Propagation Delay | 1.48 ns | — |
| Temperature na Operasyon | 0C to +85C | -40C to +85C (industrial, 'N' suffix) |
| Packhaging | 1020-ball FC-FBGA (33 mm x 33 mm) | 144-ball FineLine BGA |
| Ball Pitch | 1.27 mm | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | Non-compliant (legacy Altera product) | [DATA_NEEDED: RoHS] |
| Lead-Free Status | Contains lead (legacy) | — |
| Multi-Voltage I/O Support | 1.5V / 1.8V / 2.5V / 3.3V / 5.0V | — |
| Embedded System Blocks | Dual-port RAM / FIFO configurable | — |
| Logic Elements | — | 24,576 |
| Typical Gates | — | 600,000 |
| Maximum System Gates | — | 1,053,840 |
| Embedded RAM Bits | — | 311,040 bits (~38 KB) |
| Number of ESBs (Embedded System Blocks) | — | [DATA_NEEDED: ESB count] |
| Number of Multiplier Blocks | — | [DATA_NEEDED: multiplier count] |
| Number of PLLs | — | 4 |
| Number of I/O Pins | — | [DATA_NEEDED: usable I/O count] |
| Core Voltage | — | 1.8 V |
| I/O Voltage Banks | — | Multi-voltage (LVTTL/LVCMOS/PCI) |
| Speed Grade | — | -2 (mid-tier) |
| Configuration Method | — | SRAM, IEEE 1532 / passive serial / passive parallel |