EP20K600EFC672-2X vs EP20K600EFC672-1XN Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600EFC672-2X sa pamamagitan ng Intel at EP20K600EFC672-1XN sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600EFC672-2X | EP20K600EFC672-1XN |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KE | APEX 20K (APEX-20KE) |
| Typical Gates | 600,000 | — |
| Logic Elements / Cells | 24,320 | — |
| Embedded Memory Bits | 311,296 | — |
| Maximum User I/O | 508 | — |
| Number of PLLs | 4 | — |
| Package Type | 672-pin FineLine BGA (FC-FBGA) | — |
| Package Size | 45 x 45 mm, 1.27 mm pitch | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.15 µm all-layer copper CMOS | 0.18 micron CMOS |
| Propagation Delay (typical) | 1.48 ns | — |
| Maximum Internal Frequency | 200 MHz | — |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0C to 85C (commercial) |
| Lead-Free Variant | EP20K600EFC672-2N | — |
| Tindminan RoHS | Not RoHS compliant (X suffix is SnPb); use -2N suffix for lead-free | [DATA_NEEDED: RoHS status] |
| Configuration Method | Serial / Parallel (Quartus-supported) | Serial or parallel, JTAG |
| System Gates | — | 1,560,000 (typical 600K) |
| Logic Elements | — | 24,320 |
| Typical Logic Elements | — | 311,296 |
| Macros (Logic Array Blocks) | — | 2,432 |
| User I/O Pins | — | 508 |
| Total RAM Bits | — | [DATA_NEEDED: total RAM bits] |
| Packhaging | — | 672-ball FineLine BGA (FBGA) |
| Ball Pitch | — | 1.0 mm |
| Supply Voltage (Core) | — | 1.8 V typical |
| Speed Grade | — | -1 (fastest) |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |