EP2A15B652C8 vs EP2A15B652C9 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A15B652C8 sa pamamagitan ng Altera at EP2A15B652C9 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A15B652C8 | EP2A15B652C9 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Logic Elements | 15,600 | 15,600 |
| Maximum User I/O | 425 | — |
| Embedded System Blocks (ESB) | 104 | — |
| Maximum Internal RAM Bits | 1,875,000 | — |
| Embedded Dual-Port RAM | Yes (True Dual-Port) | — |
| Maximum PLLs | 4 | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Process Technology | 0.15 µm CMOS | — |
| Packhaging | 652-ball FineLine BGA | 652-ball FineLine BGA |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Temperature na Operasyon | 0C to +85C (commercial) | 0 C to +85 C (commercial) |
| Speed Grade | C8 | -9 (fastest APEX II commercial) |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant |
| Embedded System Blocks | — | 425 Kbits |
| Number of DLLs/PLLs | — | 4 PLUs |
| Core Voltage | — | 1.5 V |
| I/O Voltage Standards | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V (LVTTL, LVCMOS, LVDS, SSTL, HSTL) |
| Configuration Method | — | SRAM-based, JTAG 1149.1 boundary scan |
| Programming File Format | — | .pof / .sof (Quartus) |
| Level ng MSL | — | 3 (168 hours) |
| Lead-Free | — | Yes |
| Katayuan ng Lifecycle | — | Obsolete - new design not recommended |