EP2A15B652C8 vs EP2A15B652C9 比較
詳細並排比較 EP2A15B652C8 由 Altera 與 EP2A15B652C9 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2A15B652C8 | EP2A15B652C9 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Logic Elements | 15,600 | 15,600 |
| Maximum User I/O | 425 | — |
| Embedded System Blocks (ESB) | 104 | — |
| Maximum Internal RAM Bits | 1,875,000 | — |
| Embedded Dual-Port RAM | Yes (True Dual-Port) | — |
| Maximum PLLs | 4 | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Process Technology | 0.15 µm CMOS | — |
| 封裝 | 652-ball FineLine BGA | 652-ball FineLine BGA |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| 工作溫度 | 0C to +85C (commercial) | 0 C to +85 C (commercial) |
| Speed Grade | C8 | -9 (fastest APEX II commercial) |
| RoHS 狀態 | [DATA_NEEDED: rohs status] | Compliant |
| Embedded System Blocks | — | 425 Kbits |
| Number of DLLs/PLLs | — | 4 PLUs |
| Core Voltage | — | 1.5 V |
| I/O Voltage Standards | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V (LVTTL, LVCMOS, LVDS, SSTL, HSTL) |
| Configuration Method | — | SRAM-based, JTAG 1149.1 boundary scan |
| Programming File Format | — | .pof / .sof (Quartus) |
| MSL 等級 | — | 3 (168 hours) |
| Lead-Free | — | Yes |
| 生命週期狀態 | — | Obsolete - new design not recommended |