EP2A15B724C9 vs EP2A15F672C7AA Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A15B724C9 sa pamamagitan ng Intel at EP2A15F672C7AA sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A15B724C9 | EP2A15F672C7AA |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Series | APEX II | — |
| Family | APEX II (EP2A15) | APEX II |
| Logic Elements | 16640 | — |
| Number of Gates | 600000 | — |
| Embedded Memory (RAM bits) | 425984 | — |
| User I/O Count | 492 | — |
| Supply Voltage (Core) | 1.5 V | — |
| I/O Voltages Supported | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) | — |
| Process Technology | 0.15 µm all-layer copper (up to 8 metal layers) | 0.15 micrometer all-layer copper (up to 8 metal layers) |
| Maximum Internal Frequency | 500 MHz | — |
| LVDS Data Rate | Up to 1 Gbps (True-LVDS) | 1 Gbps True-LVDS |
| Interface Standards | LVDS, LVPECL, PCML, HyperTransport | — |
| Embedded Memory Type | ESB - dual-port RAM / ROM / FIFO / CAM | — |
| Clock Management | On-chip PLLs | — |
| Packhaging | 724-ball FCBGA (Fine-pitch Chip-Scale BGA) | 672-ball FC-FBGA (flip-chip) |
| Temperature na Operasyon | Commercial (0 °C to +85 °C) | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant (per Full-Electronic listing) |
| Typical Gates | — | 600K |
| Maximum System Gates | — | 1.4M |
| Logic Elements (LEs) | — | 16,640 |
| Maximum User I/O | — | 492 |
| Operating Frequency (internal) | — | 500 MHz |
| Core Voltage | — | 1.5 V |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, PCI-X, SSTL, HSTL, LVDS, LVPECL, PCML, HyperTransport |
| MultiVolt I/O Bank Voltages | — | 1.5V / 1.8V / 2.5V / 3.3V |
| Embedded Memory | — | Dual-port RAM blocks + CAM blocks |
| PLLs | — | 4 enhanced PLLs |
| Programming Interfaces | — | Passive Serial, Fast Passive Parallel, JTAG (IEEE 1149.1) |
| Operating Temperature Grade | — | Commercial (0C to +85C) |
| Lifecycle | — | Last-Time-Buy / EOL announced Nov-Dec 2016 |