EP2A40F1020C7ES vs EP2A40F1020C7N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F1020C7ES sa pamamagitan ng Intel at EP2A40F1020C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP2A40F1020C7ES EP2A40F1020C7N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family APEX II APEX II
Logic Elements 38,400 38,400
Typical Gates 1,500,000 —
Embedded Memory 655,360 bits ESB-based, 504 Kbits total
Maximum User I/O 735 —
Maximum Frequency 562 MHz —
Process Technology 0.15 µm CMOS, all-layer copper, up to 8 metal layers —
Core Voltage 1.5 V —
Packhaging 1020-pin FC-FBGA FC-FBGA-1020, 33 × 33 mm, 1.0 mm pitch, fine-line
Speed Grade C7 (with ES enhanced speed suffix) —
High-Speed Interface 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport —
Temperature na Operasyon [DATA_NEEDED: commercial/industrial grade] 0 °C to +85 °C (commercial, C7 grade)
I/O Standards LVTTL, LVCMOS, LVDS, LVPECL, PCML, HyperTransport, 1.5/1.8/2.5/3.3 V —
PLLs Up to 8 (per datasheet family feature) 4
Tindminan RoHS [DATA_NEEDED] —
Programming Interface JTAG (IEEE 1149.1), passive serial —
Uri ng Pagpapasok Surface Mount (FC-FBGA) Surface Mount
Technology — 0.15 µm all-layer copper CMOS, up to 8 metal layers
System Gates — 1,500,000 (1.5 M)
Maximum Internal Performance — 562 MHz
Propagation Delay — 1.55 ns
User I/O Pins — 735
Clock Networks — 12
True-LVDS Data Rate — 1 Gbps
Supported I/O Standards — True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, SSTL
Core Supply Voltage — 1.5 V nominal (1.425 V – 1.575 V)
Logic Family — CMOS
Terminal Form — BGA ball (flip-chip)

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