EP2A40F1020C7ES vs EP2A40F1020C7N 比較

詳細並排比較 EP2A40F1020C7ES 由 Intel 與 EP2A40F1020C7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2A40F1020C7ES EP2A40F1020C7N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX II APEX II
Logic Elements 38,400 38,400
Typical Gates 1,500,000 —
Embedded Memory 655,360 bits ESB-based, 504 Kbits total
Maximum User I/O 735 —
Maximum Frequency 562 MHz —
Process Technology 0.15 µm CMOS, all-layer copper, up to 8 metal layers —
Core Voltage 1.5 V —
封裝 1020-pin FC-FBGA FC-FBGA-1020, 33 × 33 mm, 1.0 mm pitch, fine-line
Speed Grade C7 (with ES enhanced speed suffix) —
High-Speed Interface 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport —
工作溫度 [DATA_NEEDED: commercial/industrial grade] 0 °C to +85 °C (commercial, C7 grade)
I/O Standards LVTTL, LVCMOS, LVDS, LVPECL, PCML, HyperTransport, 1.5/1.8/2.5/3.3 V —
PLLs Up to 8 (per datasheet family feature) 4
RoHS 狀態 [DATA_NEEDED] —
Programming Interface JTAG (IEEE 1149.1), passive serial —
安裝類型 Surface Mount (FC-FBGA) Surface Mount
Technology — 0.15 µm all-layer copper CMOS, up to 8 metal layers
System Gates — 1,500,000 (1.5 M)
Maximum Internal Performance — 562 MHz
Propagation Delay — 1.55 ns
User I/O Pins — 735
Clock Networks — 12
True-LVDS Data Rate — 1 Gbps
Supported I/O Standards — True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, SSTL
Core Supply Voltage — 1.5 V nominal (1.425 V – 1.575 V)
Logic Family — CMOS
Terminal Form — BGA ball (flip-chip)

資料表與資源

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