EP2A40F1020C8N vs EP2A40F1020C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F1020C8N sa pamamagitan ng Intel at EP2A40F1020C8 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40F1020C8N | EP2A40F1020C8 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Product Type | Field-Programmable Gate Array (FPGA) | — |
| Device Family | APEX II | — |
| Logic Technology | CMOS | — |
| Logic Gates | 1.5 million | — |
| Logic Cells | 38,400 | 38,400 |
| Nominal Supply Voltage | 1.5 V | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| User I/Os | 735 | — |
| Package Terminal Count | 1,020 pins | — |
| Package Type | FC-FBGA, BGA-1020 | FC-FBGA (FineLine BGA) |
| Package Body Size | 33 mm x 33 mm | — |
| Ball Pitch | 1 mm | 1.0 mm |
| Reported Operating Frequency | 376 MHz | — |
| Alternative Reported Frequency | 562 MHz | — |
| Reported Propagation Delay | 1.78 ns | — |
| Alternative Reported Propagation Delay | 1.55 ns | — |
| Fabrication Process | 0.15 µm | — |
| Maximum Reported Metal Layers | 8 layers | — |
| Temperature na Operasyon | 0 °C to 85 °C | 0 C to +85 C (commercial, 'C' suffix) |
| Uri ng Pagpapasok | Surface Mount | — |
| Terminal Form | Ball | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: confirm per lot] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX II |
| Logic Family | — | CMOS |
| Process Technology | — | 0.15 µm all-layer copper, up to 8 metal layers |
| System Gates | — | 1,500,000 |
| Macros / Macro Cells | — | 2,560 |
| Embedded RAM | — | [DATA_NEEDED: total ESB bits] |
| Maximum Internal Frequency | — | 376 MHz |
| Propagation Delay | — | 1.55 ns |
| User I/O Pins | — | 735 |
| Core Voltage (VCCINT) | — | 1.5 V |
| I/O Voltage (VCCIO) | — | MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V |
| Package Pin Count | — | 1020 |
| Package Dimensions | — | 33 x 33 mm |
| Configuration Interface | — | JTAG / Altera serial |
| Design Toolchain | — | Quartus II (legacy version 4.x or earlier recommended) |