EP2A40F672C8N vs EP2A40F672I7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F672C8N sa pamamagitan ng Intel at EP2A40F672I7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40F672C8N | EP2A40F672I7 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Series | EP2A40 | — |
| Logic Family | CMOS | — |
| System Gates | 1.5 M | — |
| Logic Elements / Cells | 38,400 | — |
| Maximum Operating Frequency | 376 MHz | — |
| Propagation Delay | 1.55 ns | — |
| Technology Node | 0.15 µm | — |
| Process Feature | All-layer copper, up to 8 metal layers | — |
| Nominal Supply Voltage (VCCINT) | 1.5 V | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| User I/Os | 492 | — |
| Number of Pins / Balls | 672 | — |
| Package Type | FC-FBGA (FineLine BGA) | — |
| Package Dimensions | 27 x 27 mm | — |
| Ball Pitch | 1.0 mm | — |
| LVDS Data Rate | 1 Gbps | — |
| Embedded PLLs | 4 | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Operating Temperature (Commercial) | 0 °C to 85 °C | — |
| Speed Grade | C8 | -7 (speed grade 7) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Logic Elements | — | 38,400 |
| Maximum System Gates | — | 1,500,000 |
| Maximum User I/O | — | [DATA_NEEDED: max user I/O pins for F672 package] |
| Core Voltage (VCCINT) | — | 1.5 V |
| I/O Voltage (VCCIO) | — | [DATA_NEEDED: VCCIO supported levels] |
| Process Technology | — | 0.15 µm CMOS |
| Core Frequency (max) | — | 562 MHz |
| Temperature na Operasyon | — | -40 °C to +85 °C (Industrial) |
| Packhaging | — | 672-ball FC-FBGA |
| Package Family | — | Fine-pitch Chip-scale BGA |
| Uri ng Pagpapasok | — | Surface Mount |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | — | 3 |
| Peak Reflow Temperature | — | 220 °C |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |