EP2A70B724C7N vs EP2A70B724C8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A70B724C7N sa pamamagitan ng Altera at EP2A70B724C8N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2A70B724C8N - APEX II FPGA, 3M Gates, 724-FCBGA | Altera / Intel
EP2A70B724C8N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2A70B724C7N | EP2A70B724C8N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | APEX II (EP2A70) | FPGA (PLD) |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Technology | 0.15 µm CMOS | — |
| System Gates | 3,000,000 | 3,000,000 (3 M) |
| Logic Cells / Logic Elements | 67,200 | — |
| Maximum Internal Frequency | 420 MHz | — |
| Propagation Delay (typ.) | 2.17 ns | — |
| User I/O Pins | 536 | — |
| Macrocells (memory blocks reference) | 16 | — |
| Core Supply Voltage | 1.5 V nominal | 1.5 V |
| I/O Supply Voltage | MultiVolt (1.5V / 1.8V / 2.5V / 3.3V / 5V tolerant) | — |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial) | — |
| Packhaging | 724-pin FCBGA (Flip-Chip BGA) | — |
| Ball Pitch | 1.27 mm | — |
| Seated Height | 3.5 mm | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Configuration Method | JTAG, Passive Serial (PS), Fast Passive Parallel (FPP) | — |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| Embedded Memory | Embedded System Blocks (ESBs) - dual-port RAM / ROM / CAM | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Series | — | APEX II (EP2A70) |
| Logic Elements / Cells | — | 67,200 |
| Macrocells | — | 16 |
| Product Terms | — | 32 |
| Propagation Delay | — | 2.49 ns |
| Maximum Internal Clock Frequency | — | 281 MHz |
| Maximum Clock Frequency (fMAX) | — | 1694.91 MHz |
| Process Technology | — | 0.15 um CMOS, SRAM-based |
| Architecture | — | PLA-type / LUT-based |
| Package Type | — | FCBGA-724 (square) |
| Number of Pins / Balls | — | 724 |
| Terminal Pitch | — | 1.270 mm |
| Maximum User I/O | — | 536 |