EP2AGX45DF25I3G vs EP2AGX45DF25C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGX45DF25I3G sa pamamagitan ng Intel at EP2AGX45DF25C6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGX45DF25I3G | EP2AGX45DF25C6N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Arria II GX | — |
| Logic Elements (LE) | 42,959 | — |
| Adaptive Logic Modules (ALM) | 17,715 | — |
| Embedded Memory Bits | 3,517,440 bits | — |
| Embedded Memory M9K Blocks | [DATA_NEEDED: M9K block count] | — |
| DSP Blocks (18x18 multipliers) | [DATA_NEEDED: DSP block count] | — |
| Maximum User I/O Pins | 252 | — |
| Transceiver Channels | [DATA_NEEDED: MGT channel count] | — |
| Maximum Transceiver Data Rate | 6.375 Gbps | — |
| Packhaging | 572-ball FCBGA (HBGA) | 572-FCBGA (UBGA-358 pin variant per datasheet summary) |
| Package Dimensions | 25 mm x 25 mm | — |
| Hanay ng Temperature na Operasyon | -40C to +100C (Industrial) | — |
| Speed Grade | I3 | C6 (commercial) |
| Process Node | 40 nm | 40 nm |
| Supply Voltage (Core) | [DATA_NEEDED: VCCINT] | — |
| Hard IP for PCIe | PCIe Gen1/Gen2 endpoints and root ports | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Level ng MSL | 3 | — |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | Yes |
| Device Family | — | Arria II GX |
| Logic Elements | — | 42,959 |
| Logic Array Blocks (LABs/CLBs) | — | 1,805 |
| Total Block Memory | — | 2,898 Kbit |
| User I/Os | — | 252 |
| Transceivers | — | 8 |
| Transceiver Data Rate (max) | — | 6.375 Gbps |
| Core Voltage | — | 0.9 V |
| Temperature na Operasyon | — | 0C to +85C (commercial) |