EP2AGZ300FF35C4G vs EP2AGZ300FF35C3G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGZ300FF35C4G sa pamamagitan ng Intel at EP2AGZ300FF35C3G sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGZ300FF35C4G | EP2AGZ300FF35C3G |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Family | Arria II GZ | — |
| Logic Elements | 300,000 | 300,000 |
| Adaptive Logic Modules (ALMs) | 119,000 | 119,088 |
| Embedded Memory | 16,624 Kbit (M9K + M144K) | 17,133 Kbit |
| Embedded 18x18 Multipliers | 736 | — |
| User I/O Pins | 554 | — |
| Transceivers | 12 channels | 16 channels, up to 6.375 Gbps |
| Max Transceiver Data Rate | 6.375 Gbps (C4 speed grade) | — |
| Packhaging | 1152-ball FineLine BGA (FBGA-1152), 35x35 mm | FCBGA-1152 (35 mm) |
| Temperature na Operasyon | 0°C to +85°C (commercial C4 grade) | — |
| Speed Grade | 4 | 3 (mid-performance) |
| Process Technology | 40 nm TSMC | 40 nm TSMC |
| Core Voltage | 0.85 V to 1.1 V | — |
| PLLs | 8 (up to 4 per quadrant) | — |
| Global Clock Networks | 16 | — |
| PCIe Hard IP | PCIe Gen2 x4 | — |
| Hard Memory Controller | DDR3 up to 800 MHz | DDR3 up to 800 MHz, DDR2, QDR II+ |
| Configuration | Passive Serial, Fast Passive Parallel, JTAG | — |
| Tindminan RoHS | Compliant | Compliant |
| Level ng MSL | 3 (168 hours) | — |
| Series | — | Arria II GZ |
| DSP Blocks | — | 16-bit x 18-bit x 18-bit multipliers, integer/fractional modes |
| Hard PCIe Controllers | — | Up to 12 (Gen2 endpoint/root-port) |
| User I/Os | — | 1,288 |
| I/O Banks | — | 12 |
| Package Family | — | BGA (Flip-Chip) |
| Temperature Grade | — | Commercial (0 C to 85 C junction) |
| Configuration Method | — | Quartus II/Prime, JTAG, Passive Serial, Fast Passive Parallel |