EP2AGZ300FF35C4N vs EP2AGZ300FF35C4G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGZ300FF35C4N sa pamamagitan ng Altera at EP2AGZ300FF35C4G sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGZ300FF35C4N | EP2AGZ300FF35C4G |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Series | Arria II GZ | — |
| Logic Elements | 298,000 | 300,000 |
| Logic Array Blocks (LABs) | 11,920 | — |
| Embedded Memory (bits) | 18,854,912 (~17.9 Mbit) | — |
| User I/O Count | 554 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Process Technology | 40 nm | 40 nm TSMC |
| Core Voltage | 0.9 V | 0.85 V to 1.1 V |
| Package Type | 1152-BBGA, FCBGA (flip-chip) | — |
| Terminal Form | Ball | — |
| Package Code (JEDEC) | HBGA | — |
| Operating Temperature Grade | Commercial (C4 = 0C to +85C) | — |
| Configuration Memory | SRAM-based (volatile, requires boot device) | — |
| Transceivers | Multi-gigabit transceivers integrated | 12 channels |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | — |
| PLLs | [DATA_NEEDED: PLL count] | 8 (up to 4 per quadrant) |
| Tindminan RoHS | Compliant (per Besenchips / DigiKey listing) | Compliant |
| Lead-Free Status | Lead free (per Besenchips listing) | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Maximum Operating Frequency | 500 MHz | — |
| Family | — | Arria II GZ |
| Adaptive Logic Modules (ALMs) | — | 119,000 |
| Embedded Memory | — | 16,624 Kbit (M9K + M144K) |
| Embedded 18x18 Multipliers | — | 736 |
| User I/O Pins | — | 554 |
| Max Transceiver Data Rate | — | 6.375 Gbps (C4 speed grade) |
| Packhaging | — | 1152-ball FineLine BGA (FBGA-1152), 35x35 mm |
| Temperature na Operasyon | — | 0°C to +85°C (commercial C4 grade) |
| Speed Grade | — | 4 |
| Global Clock Networks | — | 16 |
| PCIe Hard IP | — | PCIe Gen2 x4 |
| Hard Memory Controller | — | DDR3 up to 800 MHz |
| Configuration | — | Passive Serial, Fast Passive Parallel, JTAG |
| Level ng MSL | — | 3 (168 hours) |