EP2AGZ300FF35I4N vs EP2AGZ300FF35C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGZ300FF35I4N sa pamamagitan ng Intel at EP2AGZ300FF35C4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGZ300FF35I4N | EP2AGZ300FF35C4N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Series | Arria II GZ | Arria II GZ |
| Family | Field Programmable Gate Array (FPGA) | — |
| Logic Elements | 298,000 | 298,000 |
| Number of LABs/CLBs | 11,920 | — |
| Total RAM Bits | 18,854,912 bits | — |
| Number of I/O | 554 | — |
| Supply Voltage Core | 0.9 V | — |
| Process Technology | 40 nm | 40 nm |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40C to +100C (Industrial) | — |
| Package Type | 1152-BBGA, FCBGA | 1152-BBGA, FCBGA (flip-chip) |
| Package Dimensions | 35 mm x 35 mm | — |
| Supplier Device Package | 1152-FBGA (35x35) | — |
| Tindminan RoHS | Compliant | Compliant (per Besenchips / DigiKey listing) |
| Lead-Free | Yes | — |
| Logic Array Blocks (LABs) | — | 11,920 |
| Embedded Memory (bits) | — | 18,854,912 (~17.9 Mbit) |
| User I/O Count | — | 554 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Core Voltage | — | 0.9 V |
| Terminal Form | — | Ball |
| Package Code (JEDEC) | — | HBGA |
| Operating Temperature Grade | — | Commercial (C4 = 0C to +85C) |
| Configuration Memory | — | SRAM-based (volatile, requires boot device) |
| Transceivers | — | Multi-gigabit transceivers integrated |
| DSP Blocks | — | [DATA_NEEDED: number of DSP blocks] |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Lead-Free Status | — | Lead free (per Besenchips listing) |
| Maximum Operating Frequency | — | 500 MHz |