EP2AGZ300FF35I4N vs EP2AGZ300FF35C4N 比較
詳細並排比較 EP2AGZ300FF35I4N 由 Intel 與 EP2AGZ300FF35C4N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2AGZ300FF35I4N | EP2AGZ300FF35C4N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | Obsolete |
| Series | Arria II GZ | Arria II GZ |
| Family | Field Programmable Gate Array (FPGA) | — |
| Logic Elements | 298,000 | 298,000 |
| Number of LABs/CLBs | 11,920 | — |
| Total RAM Bits | 18,854,912 bits | — |
| Number of I/O | 554 | — |
| Supply Voltage Core | 0.9 V | — |
| Process Technology | 40 nm | 40 nm |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | -40C to +100C (Industrial) | — |
| Package Type | 1152-BBGA, FCBGA | 1152-BBGA, FCBGA (flip-chip) |
| Package Dimensions | 35 mm x 35 mm | — |
| Supplier Device Package | 1152-FBGA (35x35) | — |
| RoHS 狀態 | Compliant | Compliant (per Besenchips / DigiKey listing) |
| Lead-Free | Yes | — |
| Logic Array Blocks (LABs) | — | 11,920 |
| Embedded Memory (bits) | — | 18,854,912 (~17.9 Mbit) |
| User I/O Count | — | 554 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Core Voltage | — | 0.9 V |
| Terminal Form | — | Ball |
| Package Code (JEDEC) | — | HBGA |
| Operating Temperature Grade | — | Commercial (C4 = 0C to +85C) |
| Configuration Memory | — | SRAM-based (volatile, requires boot device) |
| Transceivers | — | Multi-gigabit transceivers integrated |
| DSP Blocks | — | [DATA_NEEDED: number of DSP blocks] |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Lead-Free Status | — | Lead free (per Besenchips listing) |
| Maximum Operating Frequency | — | 500 MHz |