EP2C20F256C7N vs EP2C20F256C8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2C20F256C7N sa pamamagitan ng Altera at EP2C20F256C8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2C20F256C7N | EP2C20F256C8N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Huling Pagbili |
| Series | Cyclone II | Cyclone II |
| Family | FPGA Cyclone II | Cyclone II FPGA |
| Number of Logic Elements (LEs) | 18752 | — |
| Number of LABs/CLBs | 1172 | — |
| Total RAM Bits | 239616 | 239,616 bits |
| Maximum User I/O Pins | 152 | 315 (device maximum, package-dependent) |
| Number of Embedded Multipliers (18x18) | 52 | — |
| Number of PLLs | 4 | 4 |
| Core Voltage | 1.2 V | — |
| Maximum Operating Frequency | 402.58 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Packhaging | 256-LBGA (FineLine BGA) 17x17 mm | 256-ball FineLine BGA (FBGA-256, F256) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +85C (Commercial) | Commercial (0C to +85C) |
| Level ng MSL | 3 (168 hours) | — |
| Configuration Method | SRAM-based (AS, PS, JTAG) | — |
| Tindminan RoHS | Compliant | Compliant |
| Logic Elements (LEs) | — | 18,752 |
| Embedded Multipliers (18x18) | — | 152 |
| User I/O Pins on F256 Package | — | [DATA_NEEDED: exact F256 I/O count] |
| Global Clock Networks | — | 16 |
| Core Voltage (VCCINT) | — | 1.2 V (1.15 V to 1.25 V range) |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) |
| Speed Grade | — | C8 |
| Lead-Free (Pb-Free) | — | Yes (N suffix) |