EP2C50F672C6 vs EP2C50F672C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2C50F672C6 sa pamamagitan ng Intel at EP2C50F672C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2C50F672C7 - Cyclone II FPGA, 50K LE, 672-FBGA | Intel / Altera
EP2C50F672C7 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2C50F672C6 | EP2C50F672C7 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Series | Cyclone II | — |
| Logic Elements (LE) | 50,528 | 50,528 |
| Configurable Logic Blocks (CLB) | 3,158 | — |
| Embedded Memory Bits | 594,432 bits | 594,432 bits |
| Maximum User I/O | 450 | — |
| Maximum Internal Clock Frequency | 500 MHz | — |
| PLLs | 4 | — |
| Embedded 18x18 Multipliers | Yes (DSP blocks) | 86 (150 per device family datasheet figure) |
| Process Technology | 90 nm CMOS | 90 nm CMOS with low-k dielectric |
| Core Supply Voltage (VCCINT) | 1.2 V | — |
| Packhaging | 672-ball FBGA (FineLine BGA) | 672-ball FineLine BGA (FBGA-672) |
| Uri ng Pagpapasok | Surface Mount | — |
| Configuration Modes | JTAG, Active Serial, Passive Serial | Passive Serial (PS), Active Serial (AS), JTAG |
| Operating Temperature Grade | Commercial (0 C to +85 C) - C6 speed grade | — |
| Tindminan RoHS | Compliant | — |
| Family | — | Cyclone II |
| Embedded Memory Blocks | — | 250 M4K blocks (4 Kbit each) |
| User I/O Pins | — | 450 |
| Phase-Locked Loops (PLL) | — | 4 |
| Global Clock Networks | — | 16 |
| Core Voltage (VCCINT) | — | 1.2 V |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.0 V / 3.3 V (per bank) |
| Speed Grade | — | -7 |
| Temperature Grade | — | Commercial (0C to +85C junction) |
| Lead-Free / RoHS | — | Lead-Free / RoHS compliant per Heisener listing |