EP2C8T144C6N vs EP2C8T144C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2C8T144C6N sa pamamagitan ng Intel at EP2C8T144C6 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2C8T144C6N | EP2C8T144C6 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Family | Cyclone II | Cyclone II |
| Logic Elements | 8,256 | — |
| Total RAM Bits | 165,888 | — |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | — |
| Number of Logic Elements / Cells | 8,256 | — |
| Total Memory Bits | 165,888 | — |
| Number of I/O | 85 | — |
| Number of Multipliers (18x18) | [DATA_NEEDED: 18x18 multiplier count] | — |
| Number of PLLs | [DATA_NEEDED: PLL count] | — |
| Voltage - Supply | 1.15 V to 1.25 V (core) | — |
| Temperature na Operasyon | 0C to +85C (commercial) | — |
| Packhaging / Kaso | 144-LQFP (TQFP) | — |
| Supplier Device Package | 144-TQFP (20x20 mm) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Process Technology | 90 nm CMOS SRAM | 90 nm CMOS |
| Configuration Method | SRAM - volatile (EPCS/JTAG required) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | Non-compliant (per distributor listing) |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Logic Elements (LE) | — | 8,256 |
| Configurable Logic Blocks (CLB) | — | 516 |
| Embedded Memory (bits) | — | 165,888 |
| Embedded RAM Blocks | — | 36 M4K blocks (4,608 bits each) |
| Embedded 18x18 Multipliers | — | 18 |
| PLLs | — | 4 |
| User I/O Pins (max) | — | 85 |
| Maximum User I/O (this package) | — | 85 |
| Core Voltage | — | 1.2 V (typical) |
| Speed Grade | — | 6 |
| Hanay ng Temperature na Operasyon | — | Commercial (0C to +85C) |
| Packhaging | — | 144-pin LQFP (TQFP), 22x22 mm, 0.5 mm pitch |
| Configuration Interface | — | JTAG (IEEE 1149.1), Altera AS / PS / PP |
| Design Software | — | Quartus II (v13.0 SP1 recommended) |
| Maximum Internal Frequency | — | [DATA_NEEDED: see Cyclone II device handbook for fMAX by design] |