EP2S130F1020C5N vs EP2S130F1020C5ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S130F1020C5N sa pamamagitan ng Intel at EP2S130F1020C5ES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S130F1020C5N | EP2S130F1020C5ES |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Stratix II | Stratix II |
| Logic Elements | 132,540 | 132,540 |
| Adaptive Logic Modules (ALMs) | 6627 LABs (per Jotrin listing) | 53,016 |
| Total Memory Bits | 6,747,840 bits | — |
| User I/Os | 734 | — |
| Process Technology | 90 nm | 90 nm |
| Core Supply Voltage (VCCINT) | 1.15 V to 1.25 V | — |
| Maximum Internal Frequency | 609.76 MHz | — |
| Packhaging | 1020-ball FC-FBGA (33x33 mm) | 1020-ball FC-FBGA (flip-chip BGA) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | Commercial (0C to +85C, C5 grade) | — |
| Temperature Grade | C5 (other - per Partstack) | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant (lead-free) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| PLLs | 4 (typical Stratix II feature) | [DATA_NEEDED: PLL count] |
| Global Clock Networks | 16 (typical Stratix II feature) | — |
| Configuration Method | Serial/Parallel via Quartus II (typical Stratix II) | — |
| Country of Origin | Republic of Korea (per GlobalSpec) | — |
| ECCN | 3A001.a.7.a (per GlobalSpec) | — |
| Estimated EOL Date | 2023 (per GlobalSpec) | — |
| Embedded Memory Bits | — | 6,747,840 |
| Maximum User I/Os | — | 742 |
| Core Voltage | — | 1.2 V |
| Maximum Internal Clock Frequency | — | 609.76 MHz |
| Speed Grade | — | -5 |
| Operating Temperature (Junction) | — | 0C to 85C (commercial) |
| Logic Array Blocks (LABs) | — | 6,747 |
| Total RAM Blocks | — | [DATA_NEEDED: total RAM blocks] |
| Embedded DSP Blocks | — | [DATA_NEEDED: embedded DSP blocks count] |
| Embedded 18x18 Multipliers | — | [DATA_NEEDED: 18x18 multiplier count] |
| Configuration | — | SRAM-based, JTAG/AS/PS modes |