EP2S30F484C5N vs EP2S30F484C3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S30F484C5N sa pamamagitan ng Intel at EP2S30F484C3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S30F484C5N | EP2S30F484C3N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Stratix II | — |
| Logic Elements | 33880 | — |
| Adaptive Logic Modules (ALMs) | 13552 | — |
| Logic Array Blocks (LABs) | 1694 | — |
| Maximum User I/O Pins | 342 | — |
| Embedded RAM Bits | 1369728 | — |
| DSP Blocks | 24 | — |
| Embedded 18x18 Multipliers | 24 | — |
| PLLs | 12 | — |
| Core Voltage (VCCINT) | 1.2 V | — |
| Process Technology | 90 nm CMOS | — |
| Speed Grade | C5 | — |
| Maximum Internal Frequency | 609.76 MHz | 816.99 MHz |
| Packhaging | 484-Ball FBGA (FBGA-484) | — |
| Package Dimensions | 23 x 23 mm, 1.0 mm pitch | — |
| Temperature na Operasyon | 0C to +85C (commercial) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 (168 hours) | — |
| Tindminan RoHS | Compliant | — |
| FPGA Family | — | Stratix II |
| Number of Logic Elements/Cells | — | 33880 cells |
| Number of LABs | — | 1694 LABs |
| Total RAM Bits | — | 1369728 bits |
| Number of User I/Os | — | 342 |
| Core Supply Voltage | — | 1.2 V |
| Technology Process | — | 90 nm CMOS |
| Packhaging / Kaso | — | 484-BBGA, FC-FBGA |
| Number of Ball Terminals | — | 484 |
| Terminal Form | — | Ball |
| Package Shape | — | Square |
| Embedded Memory Blocks | — | [DATA_NEEDED: exact M4K/M512/M-RAM block counts] |
| Embedded Multipliers | — | [DATA_NEEDED: number of 18x18 embedded multipliers] |