EP2S30F672C4 vs EP2S30F672I4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S30F672C4 sa pamamagitan ng Intel at EP2S30F672I4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S30F672C4 | EP2S30F672I4N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Stratix II | — |
| Logic Elements / Cells | 33,880 | — |
| Total RAM Bits | 1,369,728 | 1,369,728 |
| Number of I/O | 500 | — |
| Packhaging | 672-BBGA, FCBGA (27x27 mm) | 672-BBGA, FCBGA (27x27 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Core Voltage - Supply | 1.15 V to 1.25 V | — |
| Process Technology | 90 nm | — |
| Maximum Core Frequency (datasheet benchmark) | 711 MHz | — |
| Temperature na Operasyon | 0C to +85C (commercial, 'C' speed grade) | -40C to +100C (industrial) |
| Embedded DSP Blocks | 16 (Stratix II S30 tier) | — |
| Number of PLLs | [DATA_NEEDED: PLL count for S30 tier] | — |
| Number of Global Clock Networks | [DATA_NEEDED: global clock network count] | — |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Family | — | Stratix II |
| Logic Elements (LEs) | — | 33,880 |
| Logic Array Blocks (LABs) | — | 1,694 |
| Maximum User I/Os | — | 500 |
| Core Supply Voltage | — | 1.15 V to 1.25 V |
| Technology Node | — | 90 nm |
| Speed Grade | — | I4 (speed grade 4, industrial) |
| Volte ng Pagbibigay | — | 1.15 V to 1.25 V |
| Maximum Frequency | — | 711.24 MHz |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |