EP2S30F672C5 vs EP2S30F672C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S30F672C5 sa pamamagitan ng Intel at EP2S30F672C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S30F672C5 | EP2S30F672C5N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Stratix II | — |
| Logic Elements | 33,880 | 33,880 |
| Logic Array Blocks (LABs) | 1,694 | 1694 |
| Total RAM Bits | 1,369,728 | — |
| Embedded Multipliers (DSP blocks) | 12 DSP blocks | — |
| Maximum User I/Os | 500 | — |
| Core Voltage | 1.2 V | — |
| Maximum Operating Frequency | 609.76 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Packhaging | 672-pin FC-FBGA (flip-chip) | 672-ball FBGA (FineLine BGA) |
| Speed Grade | C5 (moderate-speed bin) | C5 (-5 commercial) |
| Operating Temperature (Commercial) | 0C to 85C junction | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Uri ng Memory | TriMatrix (M512 / M4K / M-RAM) | — |
| Tindminan RoHS | [DATA_NEEDED: confirmed RoHS compliance] | — |
| Series | — | Stratix II |
| Family Name | — | Stratix II |
| Embedded Memory (bits) | — | 1,369,728 |
| User I/O Count | — | 500 |
| Supply Voltage (Core) | — | [DATA_NEEDED: core VCC value] |
| Hanay ng Temperature na Operasyon | — | Commercial (0C to +85C) |
| Number of PLLs | — | 4 |
| Global Clock Networks | — | 16 |
| Configuration Method | — | Serial / Passive Parallel / Fast Passive Parallel |
| Lead-Free / RoHS | — | Yes (N suffix) |
| Architecture | — | Adaptive Logic Module (ALM) |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Multipliers | — | [DATA_NEEDED: 18x18 multiplier count] |