EP2S30F672C5 vs EP2S30F672C5N 比較
詳細並排比較 EP2S30F672C5 由 Intel 與 EP2S30F672C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2S30F672C5 | EP2S30F672C5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | Stratix II | — |
| Logic Elements | 33,880 | 33,880 |
| Logic Array Blocks (LABs) | 1,694 | 1694 |
| Total RAM Bits | 1,369,728 | — |
| Embedded Multipliers (DSP blocks) | 12 DSP blocks | — |
| Maximum User I/Os | 500 | — |
| Core Voltage | 1.2 V | — |
| Maximum Operating Frequency | 609.76 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| 封裝 | 672-pin FC-FBGA (flip-chip) | 672-ball FBGA (FineLine BGA) |
| Speed Grade | C5 (moderate-speed bin) | C5 (-5 commercial) |
| Operating Temperature (Commercial) | 0C to 85C junction | — |
| 安裝類型 | Surface Mount (BGA) | — |
| 記憶體類型 | TriMatrix (M512 / M4K / M-RAM) | — |
| RoHS 狀態 | [DATA_NEEDED: confirmed RoHS compliance] | — |
| Series | — | Stratix II |
| Family Name | — | Stratix II |
| Embedded Memory (bits) | — | 1,369,728 |
| User I/O Count | — | 500 |
| Supply Voltage (Core) | — | [DATA_NEEDED: core VCC value] |
| 工作溫度範圍 | — | Commercial (0C to +85C) |
| Number of PLLs | — | 4 |
| Global Clock Networks | — | 16 |
| Configuration Method | — | Serial / Passive Parallel / Fast Passive Parallel |
| Lead-Free / RoHS | — | Yes (N suffix) |
| Architecture | — | Adaptive Logic Module (ALM) |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Multipliers | — | [DATA_NEEDED: 18x18 multiplier count] |