EP2S60F484C3N vs EP2S60F484C5 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S60F484C3N sa pamamagitan ng Intel at EP2S60F484C5 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S60F484C3N | EP2S60F484C5 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | Stratix II | Stratix II |
| Logic Elements | 60,440 | 60440 |
| Adaptive LUTs (ALUTs) | 48,352 | — |
| Embedded Memory (TriMatrix) | 2,544 Kbits (M4K + M512 + M-RAM) | — |
| Embedded DSP Blocks | 12 (48 GMACs at 450 MHz) | — |
| Maximum User I/O Pins | 334 | — |
| Packhaging | 484-BGA (F484), 1.0 mm pitch | 484-pin FC-FBGA (FBGA) |
| Process Technology | 90 nm CMOS, 1.2 V core | 90 nm CMOS |
| Speed Grade | -3 (fastest commercial) | C5 (Commercial) |
| Operating Temperature (Commercial) | 0C to +85C (TJ) | — |
| Supply Voltage VCCINT | 1.2 V nominal | — |
| Configuration Modes | FPP, AS, PS, JTAG | — |
| Level ng MSL | 3 (per JEDEC J-STD-020) | 3 (168 hours) |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Configurable Logic Blocks (CLBs) | — | 24176 |
| Logic Array Blocks (LABs) | — | 3022 |
| Embedded Memory (RAM bits) | — | 2,544,192 |
| Maximum User I/O | — | 334 |
| Package Size | — | 23 x 23 mm |
| Ball Pitch | — | 1.0 mm |
| Core Voltage (VCCINT) | — | 1.2 V |
| Maximum Internal Frequency | — | 609.76 MHz |
| Temperature na Operasyon | — | Commercial (0C to +85C) |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |