EP2S60F672C4N vs EP2S60F672C3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S60F672C4N sa pamamagitan ng Intel at EP2S60F672C3 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S60F672C4N | EP2S60F672C3 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Stratix II | Stratix II |
| Process Technology | 90 nm | 90 nm CMOS |
| Logic Elements (LE) | 60,440 | — |
| Adaptive Logic Modules (ALM) | 24,176 | — |
| Embedded Memory (bits) | 2,544,192 | — |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | [DATA_NEEDED: 9x9 multiplier count] |
| DSP Blocks | [DATA_NEEDED: DSP block count] | [DATA_NEEDED: DSP block count] |
| Maximum User I/O | 492 | — |
| Core Voltage | 1.2 V | 1.2 V |
| Maximum Fabric Clock | 711.24 MHz | — |
| Packhaging | 672-pin FC-FBGA | 672-BBGA, FC-FBGA, 35 x 35 mm, 1.0 mm pitch |
| Package Type | FineLine Ball-Grid Array | — |
| Speed Grade | C4 (commercial) | C3 |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (commercial) |
| Configuration Method | JTAG, Fast Passive Parallel, Active Serial | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 | [DATA_NEEDED: MSL level] |
| Lead-Free / RoHS | Yes (lead-free finish) | — |
| Logic Elements | — | 60,440 |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Total RAM Bits | — | 2,544,192 |
| User I/Os | — | 492 |
| PLLs | — | 4 |
| Global Clocks | — | [DATA_NEEDED: global clock count] |
| Configuration Modes | — | PS, PPS, PPA, FPP, JTAG |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |