EP2S60F672C4N vs EP2S60F672C3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S60F672C4N sa pamamagitan ng Intel at EP2S60F672C3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S60F672C4N | EP2S60F672C3N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Stratix II | Stratix II |
| Process Technology | 90 nm | 90 nm CMOS |
| Logic Elements (LE) | 60,440 | 60,440 |
| Adaptive Logic Modules (ALM) | 24,176 | — |
| Embedded Memory (bits) | 2,544,192 | — |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Maximum User I/O | 492 | — |
| Core Voltage | 1.2 V | — |
| Maximum Fabric Clock | 711.24 MHz | — |
| Packhaging | 672-pin FC-FBGA | 672-pin FC-FBGA |
| Package Type | FineLine Ball-Grid Array | — |
| Speed Grade | C4 (commercial) | C3 (slower speed grade) |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (commercial grade) |
| Configuration Method | JTAG, Fast Passive Parallel, Active Serial | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 | — |
| Lead-Free / RoHS | Yes (lead-free finish) | — |
| Logic Array Blocks (LABs) | — | 3,022 |
| Adaptive Logic Modules (ALMs) | — | 24,176 |
| Total Embedded Memory | — | 2,544,192 bits (2.5 Mbits) |
| User I/O Pins | — | 492 |
| User I/O Banks | — | 8 |
| Core Supply Voltage (VCCINT) | — | 1.2 V |
| I/O Supply Voltage (VCCIO) | — | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) |
| Pre-Driver Supply (VCCPD) | — | 3.3 V |
| Maximum Internal Clock Frequency | — | 816.99 MHz |
| PLLs | — | 4 |
| Global Clock Networks | — | 16 |
| Tindminan RoHS | — | unknown |
| Lead-Free | — | unknown |