EP2S90F1020C3 vs EP2S90F1020C3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S90F1020C3 sa pamamagitan ng Intel at EP2S90F1020C3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2S90F1020C3N - 90nm Stratix II FPGA 90,960 LEs FC-FBGA-1020 | Altera
EP2S90F1020C3N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2S90F1020C3 | EP2S90F1020C3N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Stratix II | Stratix II (EP2S90) |
| Logic Elements (LEs) | 90,960 | — |
| Adaptive Logic Modules (ALMs) | 36,384 | — |
| Logic Array Blocks (LABs) | 4,548 | — |
| Embedded Memory (RAM bits) | 4,520,488 (~4.5 Mbit) | — |
| Maximum User I/Os | 758 | — |
| Embedded Multipliers (18x18) | 384 | — |
| Embedded DSP Blocks | 48 | — |
| Transceiver Channels | 12 | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V | — |
| Maximum Internal Clock Frequency | 816.99 MHz (family maximum) | — |
| Packhaging | 1020-pin FC-FBGA (Flip-Chip Fine-pitch BGA) | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Operating Temperature (Speed Grade) | C3 (commercial speed grade) | — |
| Lead-Free / RoHS | Per Altera/Intel product page | — |
| Design Toolchain | Quartus II / Quartus Prime | — |
| Series | — | Stratix II |
| Logic Elements | — | 90,960 |
| LABs (Logic Array Blocks) | — | 4,548 |
| Total RAM Bits | — | 4,520,488 |
| User I/O Count | — | 758 |
| Supply Voltage - Core | — | 1.15 V to 1.25 V (1.2 V nominal) |
| Temperature na Operasyon | — | 0C to +85C (commercial grade) |
| Speed Grade | — | C3 (commercial, slowest) |
| Packhaging / Kaso | — | 1020-BBGA, FC-FBGA |
| Supplier Device Package | — | 1020-FBGA (33 x 33 mm) |
| DSP Block Count | — | [DATA_NEEDED: 18x18 multiplier count] |
| Embedded Transceivers | — | [DATA_NEEDED: number of high-speed transceivers] |
| Maximum User I/O Frequency | — | [DATA_NEEDED: LVDS / DDR max rate] |
| Tindminan RoHS | — | Compliant |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |
| Programming Tool | — | Altera Quartus II |