EP2S90F1020I5N vs EP2S90F1020I3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S90F1020I5N sa pamamagitan ng Altera at EP2S90F1020I3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2S90F1020I3N - 90K LE Stratix II FPGA 1.2V FC-FBGA-1020 | Altera
EP2S90F1020I3N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2S90F1020I5N | EP2S90F1020I3N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Huling Pagbili |
| Series | Stratix II | — |
| Logic Elements | 90,960 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | [DATA_NEEDED: ALM count] |
| Total RAM Bits | 4,520,448 (approx. 4.5 Mbits) | — |
| Embedded 18x18 Multipliers | [DATA_NEEDED: DSP block count] | — |
| Maximum User I/O Pins | [DATA_NEEDED: user I/O count] | — |
| Transceiver Channels | Up to 12 | — |
| Transceiver Data Rate (max) | 1 Gbps per channel | — |
| Number of PLLs | 8 | — |
| Core Voltage | 1.2 V | — |
| Process Technology | 90 nm CMOS | 90 nm |
| Packhaging | 1020-ball FineLine BGA (FBGA) | 1020-ball FC-FBGA (Flip-Chip Fine-pitch BGA) |
| Temperature na Operasyon | -40C to +100C (industrial) | — |
| Speed Grade | 5 | I3 (industrial temperature range) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Family | — | Stratix II |
| Logic Elements (LEs) | — | 90,960 |
| Embedded Memory Bits | — | 4,520,488 |
| Embedded DSP Blocks | — | 12 (9-bit x 9-bit multiplier support) |
| Core Supply Voltage (VCCINT) | — | 1.2 V |
| Maximum Internal Frequency | — | 816.99 MHz (per datasheet headline) |
| Pin/Ball Count | — | 1020 |
| Temperature ng Junction na Operasyon | — | -40C to +100C (industrial, per I3 suffix) |
| User I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Maximum User I/O | — | [DATA_NEEDED: maximum user I/O count] |
| Lead-Free | — | Yes |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |