EP2SGX30DF780C4 vs EP2SGX30DF780C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2SGX30DF780C4 sa pamamagitan ng Intel at EP2SGX30DF780C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2SGX30DF780C4 - Stratix II GX FPGA 33.8K LE FBGA-780 | Intel
EP2SGX30DF780C4 ✗ Tapus ng BuhayIntel
EP2SGX30DF780C7 - Stratix II GX FPGA 33.7K LE | Intel (Altera) | 780-BGA
EP2SGX30DF780C7 ObsoletePagsanggunian na paghahambing
| Parametro | EP2SGX30DF780C4 | EP2SGX30DF780C7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Tapus ng Buhay | Obsolete |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 33,880 | — |
| Logic Cells | 33,880 | — |
| Number of LABs / CLBs | 1,694 | — |
| Total Number of I/Os | 361 | — |
| Maximum Operating Frequency | 717 MHz | — |
| Number of Transceivers | 20 (embedded multi-gigabit) | — |
| Core Voltage | 1.2 V | — |
| Packhaging | FBGA-780 (780-FBGA, 29 x 29 mm, 1 mm pitch) | 780-Ball FBGA (DF780), 1.0 mm pitch |
| Uri ng Pagpapasok | Surface Mount | — |
| Process Technology | 90 nm CMOS | — |
| Operating Temperature Grade | Commercial (C4) | — |
| Programmable Terminals | BGA ball grid (780 terminals) | — |
| Package Code | BGA | — |
| Package Shape | Square | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | Compliant (per manufacturer product page) | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | — |
| Series | — | Stratix II GX |
| Logic Elements (LE) | — | 33,880 |
| Embedded Memory (bits) | — | 1,369,728 |
| Memory Blocks | — | 482 (M512/M4K/M-RAM) |
| DSP Blocks | — | 24 |
| 18x18 Multipliers | — | 192 |
| Maximum User I/O | — | 361 |
| Speed Grade | — | -7 |
| Temperature na Operasyon | — | 0C to +85C (Commercial) |
| Process Node | — | 90 nm |
| Core Voltage (VCCINT) | — | 1.2 V (typ) |
| Configuration | — | PS / FPP / JTAG |
| Transceiver Data Rate | — | [DATA_NEEDED: SERDES data rate] |